1. Field of the Invention
The present invention relates to the structural method of logic gates in the digital integrated circuits composed of CMOS (complementary MOS) transistors.
2. Prior Art
In FIG. 1, a conventional CMOS exclusive NOR gate circuit (hereinafter abbreviated as XNOR) is shown. This is a well-known circuit, wherein A and B represent inputs, and Y represents an output. This circuit is composed of a NAND gate 1 having A and B as its two inputs and a composite gate 2 having X.sub.1, an output of the NAND gate, and A and B as its inputs. When the output X.sub.1 of the NAND gate 1 is at the low-level "L", that is, when the two inputs A and B are at the high-level "H", a P-channel MOS transistor 3 turns on and an N-channel MOS transistor 4 turns off, thereby the output Y of the composite gate becomes "H". And when the output X.sub.1 is "H", that is, when the two inputs A and B are "L", the output Y becomes "H", on the other hand when one of the two inputs A and B is "H" and the other is "L", Y becomes "H". Accordingly, it is understood that the circuit of FIG. 1 operates as an XNOR in the positive logic. Hereupon, in this circuit of FIG. 1, five P-channel transistors and five N-channel transistors are used, that is, in total ten transistors are used.
Also, in FIG. 2, a conventional CMOS exclusive OR gate circuit (hereinafter, abbreviated as XOR) is shown. This is a well-known circuit, wherein A and B represent inputs, and Y represents an output. When an output of a first stage NAND gate is at the low-level "L" (ground level=V.sub.SS), that is, when the two inputs A and B are at the high-level "H" (V.sub.DD level), an output of a next stage becomes "H", and when two inputs are at other combination of their input levels, the next stage acts as a NOR-gate and its output is inverted at an inverter at a final stage and becomes the output Y. Therefore, the circuit of FIG. 2 operate as a positive XOR gate. Hereupon, in this circuit, six P-channel transistors and six N-channel transistors are used, that is, in total twelve transistors are used.
As has been described above, in those conventional XNOR or XOR gate circuits, for their number of gate of two, they already include a considerably large number of transistors, making their integration scale, operation speed, and power consumption worse.